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RM0008
Table 111. FSMC_BCRx bit fields
Flexible static memory controller (FSMC)
Bit No.
31-20
19
18-15
14
13
12
11
10
9
8
7
6
5-4
3-2
1
0
Bit name
CBURSTRW
EXTMOD
WAITEN
WREN
WAITCFG
WRAPMOD
WAITPOL
BURSTEN
FWPRLVL
FACCEN
MWID
MTYP
MUXEN
MBKEN
Value to set
0x0000
0x1
0x0
0x0
When high, the first data after latency period is taken as always
valid, regardless of the wait from memory value
no effect on synchronous read
0x0
to be set according to memory
to be set according to memory
no effect on synchronous write
Set to protect memory from accidental writes
Set according to memory support
As needed
0x1
As needed
0x1
Table 112. FSMC_TCRx bit fields
Bit No.
31-30
27-24
23-20
19-16
15-8
7-4
3-0
Bit name
-
DATLAT
CLKDIV
BUSTURN
DATAST
ADDHLD
ADDSET
Value to set
0x0
Data latency
0 to get CLK = HCLK (not supported)
1 to get CLK = 2 × HCLK
No effect
No effect
No effect
No effect
Doc ID 13902 Rev 9
435/995
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